Active-clamp forward (ACF) controllers are popular in high-frequency dc-dc modules: near-zero voltage switching, reduced size magnetics, and energy-efficient designs are the hallmarks of ACF.If designing a power stage requires attention to any high-power design, the control-output transfer function of the converter provides a good understanding of the compensation strategy to meet design goals such as crossover and phase margin.This article will first discuss the ACF transfer function and then give a typical compensation example.nrHedncFigure 1 shows a simplified circuit diagram of an ACF whose operation details can be found in Reference [1].Normally, transistor Q1 operates in a classic forward converter, but when it is turned off, its demagnetization process involves a resonant period between the clamping capacitor Cclp and the primary inductor Lmag.A portion of the energy stored in the magnetizing inductance diverts the lumped capacitance at the drain connection, while VDS(t) rises until a path is found through the body diode of Q2.The latter is then short-circuited by turning on Q2 under zero voltage switching (ZVS) conditions: now, the drain of Q1 is clamped to Vclp, which is Vin plus Cclp.Considering the resonant period between Lmag and Cclp, the circulating current will eventually reverse and flow through Q2 (on state) and the magnetizing inductance Lmag.nrHedncnrHedncIn these expressions, rL and rC represent the output inductor (Lout) and capacitor (Cout) equivalent series resistance (ESR), respectively, ron1 represents the main switching transistor rDS(on), and ron2 represents the active clamp transistor rDS(on) , N represents the transformer turns ratio, and D0 represents the static duty cycle.nrHedncFrom this expression, we can obtain Bode plots of the magnitude and phase responses in the 10-Hz to 100-kHz frequency range (shown in Figure 3).The value for each device is that of a 3.3-V/30-A dc-dc module powered by ON Semiconductor's NCP1566 reference [2].The active clamp section is intentionally undamped and assumes that Q2 is a low rDS(on) MOSFET.nrHedncWhen the frequency reaches the resonance described by Equation (3), you can observe an amplitude glitch affected by severe phase distortion.The drop in amplitude is attributed to the sudden increase in the primary side resonant current, which causes a voltage drop across the primary side power MOSFET Q1.As shown by the right-hand term in equation (1), this voltage drop is subtracted from the input voltage Vin and creates an observable response notch.As suggested in References [3] and [4], it is wise to choose a crossover point before the minimum resonant frequency of Lmag-Cclp, since there is a severe phase lag.However, the crossover can be extended if proper damping is applied in the active clamp circuit.As shown in Reference [5], the effect of this decision on the peak drain-source voltage of the main MOSFET must be carefully studied under transient conditions.Figure 4 shows the same transfer function, now suppressed by the 2.5-Ω rDS(on) of Q2: the magnitude and phase responses are very close to those of a classical forward converter and can be selected outside the resonance notch fc.nrHedncThe expression given in Equation (1) does not include the effect of the PWM module.In an isolated dc-dc converter, the regulation loop is on the secondary side, and the optocoupler biases the controller feedback pin to control the duty cycle.One scheme common in high power converters is a shunt regulator: instead of pulling the pin down to ground through a common emitter configuration, the optocoupler connects the controller through the emitter and injects current.This current is mirrored internally and can pull down an internal node loaded by a 50kΩ resistor.This voltage-biased PWM comparator ensures regulation.This technique minimizes the Miller effect due to the quasi-constant VCE voltage when the input dynamic resistive voltage drop is small: the optocoupler poles are pushed to higher frequencies, avoiding problems when closing the loop.The dynamic resistance rd=400Ω, but it has no influence on the frequency analysis.It will have an effect if you connect the capacitive feedback pin to ground.However, other than this configuration, the impedance needs to be ac because a separate optocoupler can regulate the input current.This current is divided by 10 (divided in units) and is pulled high to adjust the internal operating point.nrHedncIn equation (1), you can see that Vin appears on the right side of the equation, indicating that the DC gain of the transfer function (s=0) will vary with the input voltage.Therefore, both the crossover frequency and stability may be affected.With the PWM transfer function (Equation (4)), Vin in the denominator cancels out the effect of the input voltage, stabilizing the loop gain and crossover frequency over the input range.nrHedncTo design the loop gain of the ACF converter, we need a transfer function that relates the PWM mode excitation factor D(s) to the observed variable Vout(s) response.We will apply selected design strategies through pole-zero locations to ensure robustness and good transient response of the converter.nrHedncFigure 6 shows a typical architecture with a Type3 compensator isolated with an optocoupler.The optocoupler itself is affected by the current transfer ratio (CTR) and the pole, whose location depends on the load resistance.In this application, the shunt regulation feedback input reads the optocoupler current.The load resistance is rd and is fairly small, which means that we have to describe a rather high frequency optocoupler pole in order to neutralize it later Ref. [7].Note here that the LED is connected to a quiet Vcc point (or auxiliary voltage Vaux) on the secondary side, fully AC coupled to Vout.This needs to be taken care of, otherwise a fast channel will be created, distorting the frequency response of the compensator reference [7].The AC current in the LED (ignoring its dynamic resistance) is given by: nrHedncZf and Zi are the impedances circled in FIG. 6 .From these two networks, we can use a quick analysis of the circuit technical reference [8] to infer the location of our desired transfer function zeros.With Vout excited, what combination of Zf and Zi impedances are required to make the output VFB zero?nrHedncIn this example, Rpullup is 50kΩ, RLED is arbitrarily fixed at 1kΩ, and R1 is 1662Ω.nrHednc1.When Vout is tuned at sz, the Zi amplitude is infinite, then VFB(sz) = 0V.Zi consists of numerator and denominator D(s).When D(sz) = 0, this impedance is infinite.Therefore, the poles of this first-order network are the zeros we want.The time constant affecting Zi is obtained by temporarily disconnecting C3 and "observing" the resistance provided through its connecting terminal.In our minds, the time constant is just the network poles or transfer function zeros.nrHedncIn this case consider R3 << R1 and C2 << C1.nrHedncWith the full Type3 transfer function in hand, we can come up with a compensation strategy based on the power stage response of the converter we want to stabilize.We have several options for obtaining this response.We can calculate it with Mathcad® and the analytical expression (1) we give, or it can be calculated on the workbench.For the latter option, we need a working hardware.Another viable option is the SIMPLIS® simulation circuit shown in Figure 7.nrHedncSIMPLIS® is a piecewise linear (PWM) simulator that allows you to extract small signal responses from switching converters.Considering a simple analog circuit, the control-output response may be available in seconds from the demo version Element (https://www.simplistechnologies.com/).Figure 8 shows the phase and magnitude plots.This response corresponds to that of a converter outputting 3.3V/30A from a 36-72-V input line.The main controller is ON Semiconductor's NCP1566, which operates at a switching frequency of 500kHz.The transformer turns ratio is 6:1 and the secondary inductance is 0.5µH.The glitches generated by the active clamp resonant network are well controlled and can be safely crossed over.In this example we will choose a crossover frequency fc of 30 kHz.nrHednc5. Normalized device values ​​calculated from Mathcad® sheet reference [2] yield the following results: R2 is 390Ω (CTR = 1), C1 = 100nF, C2 = 22nF, R3 = 27Ω, C3 = 22nF.nrHedncCrossing over at around 30 kHz indicates a fast op amp, and its own response will not affect the waveform of the Type3 you want to build.Reference [9] explains how a poorly chosen op amp affects the performance of the final compensator, severely degrading the phase margin.In this example, we chose a TLV271, and the initial Type3 phase and magnitude response was not affected by this circuit.Also, note the effect of the optocoupler on the compensator response.PS2801 is a classic dc-dc converter.As mentioned earlier, the parallel-based feedback path applies reasonable collector current and regulates the emitter voltage, modeled on a cascade-like architecture: considering a near-constant Vce voltage, the Miller effect is greatly reduced, naturally placing the optocoupler pole Go to a higher frequency.However, at the crossover frequency of 30 kHz, it still achieves the expected phase margin, which we have compensated for by placing a simple capacitor in parallel with the RLED, as shown in Figure 6.nrHedncWe can now plot the loop gain T(s) and check the margin.Figure 9 shows the loop gain plotted with Mathcad®.The theoretical 30kHz crossover frequency was verified, along with the desired 60° phase margin.nrHedncThe device integrates various protections and adaptive dead-time to improve the circuit's light-load energy efficiency.On-board high voltage current source ensures start-up sequence and Dynamic Self-Powering (DSS): If the auxiliary winding needs time to supply the controller, DSS supplies energy to the IC until the auxiliary voltage builds up and turns off the current source.When skipping cycles under light or no-load conditions, the auxiliary winding can be damaged due to very narrow pulses.DSS will automatically activate in this mode, self-powering the controller.nrHedncThe loop is built around two op amps.The first U4 is used for the Type3 compensator, while the U5 drives the LEDs, well suppressing current interaction with Vout (no fast channel issues).Note that the compensation value is slightly different from the calculated value, which is the difficulty associated with these dc-dc modules.Our calculations only deal with small signal responses, and when the component values ​​are plugged into the converter, the loop is stable as expected.However, there is a problem with these converters, namely how Vout rises at power up.The rise must be monotonic, with no double slope.This is a large signal run until Vout settles to its regulation value.During this time, it is difficult to predict how the individual capacitors will charge and how they will affect the output voltage rise.One way to apply a monotonic start is to soft start the secondary side reference voltage U3 via R14 and C6.Once the converter starts up, the auxiliary voltage across C37 rises rapidly (C37 needs to be a small capacitor), and through the low voltage on C6, it applies op-amp U4 to first force Vout to follow C6's exponential charge.In this case, the primary soft-start duration is reduced to limit the stress on the semiconductor, but must be limited to this effect, otherwise the two soft-start processes (primary and secondary) can oppose and distort the output voltage rise.Some adjustments are necessary.nrHedncTo measure the loop, I tested a CS328A instrument made by CleverScope New Zealand (https://cleverscope.com/).The device includes a 2-channel 14-bit oscilloscope and a frequency response analyzer (FRA) at a very competitive price.There is no need to plug in an isolation transformer because the CS328A is a solid state injector and you just need to connect the probe to the power supply.The instrument first performs a rough sweep and fine-tunes the injection level to maintain an appropriate signal/noise ratio without affecting linearity.When the instrument persistently displays the observed waveform, you can immediately check whether saturation has occurred during the sweep.And has a nice feature that avoids connecting another oscilloscope to monitor work in parallel with the FRA.The result of the sweep is shown in Figure 13, showing the correct crossover frequency and slight phase distortion.Further analysis showed that the front-end EMI filter resonated around this point and needed adequate damping.Once done, the glitch disappeared as expected.nrHednc1. C. Basso, The Small-Signal Model Of An Active-Clamp Forward Converter (Parts 1 to 3), www.How2Power.com, March 2014nrHednc2. ON Semiconductor NCP1566 page, http://www.onsemi.com/PowerSolutions/product.do?id=NCP1566nrHednc3. G. Stojcic, F. Lee and S. Hiti, Small-Signal Characterization of Active-Clamp PWM Converters, VPEC 1995, pp. 237-245nrHednc4. D. Dalal, L. Woofford, Novel Control IC for Single-Ended Active-Clamp Converters, HFPFC'95 Conf. Proc., pp. 136-146, 1995nrHednc5. Q. Li, F. Lee, M. Jovanović, Design Considerations of Transformer Dc Bias of Forward Converter with Active-Clamp Reset, Applied Power Electronics Conference Conf. Proc., pp. 553-559, March 14-18, 1998nrHednc6. C. Basso, Switch-Mode Power Supplies: SPICE Simulations and Practical Designs, McGraw-Hill, New-York 2014nrHednc7. C. Basso, Practical Implementation of Loop Control in Power Converter, Professional Seminar, Applied Power Electronics Conference, Charlotte (NC), 2015nrHednc8. C. Basso, Linear Circuit Transfer Function: A Tutorial Introduction to Fast Analytical Techniques, Wiley IEEE Press, May 2016nrHednc9. C. Basso, Understanding Op Amp Dynamic Response In A Type 2 Compensator, www.how2power.com, January and February 2017 newsletters.nrHednc10. C. Basso, Designing Control Loops for Linear and Switching Power Supplies: a Tutorial Guide, Artech House, 2012nrHednc